The present invention relates to solid-state imaging apparatus, and more particularly relates to solid-state imaging apparatus having skipping read and electronic shutter functions.
Various techniques have been proposed concerning solid-state imaging apparatus having an electronic shutter function. Japanese Patent Application Laid-Open hei-5-316431, for example, discloses a solid-state imaging apparatus where an electronic shutter function is achieved by providing a vertical scanning circuit for scanning rows to be read of a pixel section, and an electronic shutter scanning circuit for determining the timing of exposure operation where light is caused to be incident on each pixel.
The construction of a solid-state imaging apparatus having a known electronic shutter function will now be described by way of a block diagram shown in FIG. 1. The shown solid-state imaging apparatus includes: a pixel section 11 having a plurality of pixel cells PIX11 to PIX44 disposed in a matrix (showing only the sixteen pixel cells PIX11 to PIX44 for ease of explanation); a vertical scanning circuit 12 for use in selecting rows to be read out of the pixel section 11; an electronic shutter scanning circuit 13 for use in determining start of exposure; a multiplexer 14 for providing to the pixel section 11 an output of one or the other of the vertical scanning circuit 12 and the electronic shutter scanning circuit 13; a noise suppressing circuit 15 for suppressing noise contained in the signals read out to vertical signal line V1 to V4 of each column; a horizontal scanning circuit 16 for extracting signals from the noise suppressing circuit 15 by selectively turning ON/OFF horizontal select switches M1 to M4; and an output amplifier 17 for amplifying the extracted signals.
Also referring to FIG. 1, symbols are respectively used to denote: read row select lines φV1 to φV4; electronic shutter row select lines φVE1 to φVE4; pixel reset pulse line of each row φRST1 to φRST4; pixel transfer pulse line of each row φTR1 to φTR4; vertical signal line of each column V1 to V4; column select lines φH1 to φH4; and a sensor output line OUT.
An operation of the solid-state imaging apparatus shown in FIG. 1 will now be described by way of a timing chart shown in FIG. 2. The timing chart of FIG. 2 is to show the waveforms of φV1, φV2, φV3, φV4 (read row select line), φVE1, φVE2, φVE3, φVE4 (electronic shutter row select line), φRST1, φRST2, φRST3, φRST4 (pixel reset pulse line of each row), and φTR1, φTR2, φTR3, φTR4 (pixel transfer pulse line of each row). Further PD11 and PD12 represent electric potentials of photodiodes (not shown) of the pixel cells PIX11 and PIX12 in FIG. 1, respectively.
When an electronic shutter row select line φVE1 is driven to “H” level by the electronic shutter scanning circuit 13 at a timing point t1, the electronic shutter row select line φVE1 is brought into its selected state. The pixel reset pulse line φRST1 is then driven to “H” level by the multiplexer 14 to set pixel cell PIX11 to a predetermined voltage value. Subsequently, when pixel transfer pulse line φTR1 is driven to “H” level at time t2, the photodiode of pixel cell PIX11 discharges an electric charge so that electric potential PD11 of the photodiode is reset. The pixel transfer pulse line φTR1 is then driven to “L” level at time t2′. Next, read row select line φV1 is selected by the vertical scanning circuit 12 at time t4, and after that, at time t5, the pixel transfer pulse line φTR1 is driven to “H” level again by the multiplexer 14. The time period from time t2′ to time t5 until the transfer of the pixel signal of pixel cell PIX11 becomes an exposure time of the pixel cell PIX11. Since sequential scanning is effected of the electronic shutter scanning circuit 13 and the vertical scanning circuit 12, the time period from time t3′ to time t6 similarly becomes an exposure time of the pixel cell PIX12 as shown in FIG. 2.
An electronic shutter function is achieved in this manner by providing a vertical scanning circuit for scanning rows to be read of the pixel section and an electronic shutter scanning circuit for determining the timing of exposure operation where light is caused to be incident on each pixel.
Further, various techniques have been proposed concerning solid-state imaging apparatus that are capable of reading pixel signals at high rates. For example, Japanese Patent Application Laid-Open hei-9-163245 discloses a solid-state imaging apparatus having a scanning circuit capable of skipping scanning. By using a scanning circuit capable of skipping scanning as the vertical scanning circuit 12 and the electronic shutter scanning circuit 13 of the solid-state imaging apparatus shown in FIG. 1, it can be used in a mode where, for example, signals of all pixels are read out in taking a high-definition still image while signals are read out at high rate in a skipping manner in providing dynamic image outputs.